Digital Logic Design (V-U)

16-Bit ALU (V-U)

ABEL input file of a Quad 1-of-4 MUX (V-U)

Application of S-R Latch (V-U)

Applications of Edge-Triggered D Flip-flop (V-U)

Karnaugh Map & Boolean Expression Simplification (V-U)

Applications of Shift Registers (V-U)

Logic Gates & Operational Characteristics (V-U)

Asynchronous Preset and Clear Inputs (V-U)

Logic Gates (V-U)

BCD Adder (V-U)

Memory (V-U)

Boolean Algebra and Logic Simplification (contd.) (V-U)

Multiplexer (V-U)

Boolean Algebra and Logic Simplification (V-U)

Number Systems & Codes (V-U)

Comparator (V-U)

Number Systems (contd.) (V-U)

D flip-flop based Implementation (V-U)

Number Systems (V-U)

Decoding large memories (V-U)

Odd-Prime Number Detector (V-U)

Demultiplexer (V-U)

Programmable Sequential Logic (V-U)

Design Example Elevator Control System (V-U)

Read and Write Cycles (V-U)